1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More specifically, the present invention relates to a method of manufacturing a semiconductor device where MOS type semiconductor elements having gate insulating films with different film thicknesses are formed on the same semiconductor substrate.
2. Background Information
With respect to the field of semiconductor devices, forming semiconductor elements driven by different power supply voltages on the same substrate has become common. In cases of forming MOS type semiconductor elements on the same substrate, since a withstand voltage demanded according to the power supply voltage may vary, a plurality of specifications are needed with respect to film thicknesses of gate insulating films formed on the same semiconductor substrate.
In general, when forming gate insulating films with different film thicknesses, a technique of performing an oxidization process in two or more steps is used. In most cases, the oxidization process is divided into two steps. This technique of oxidization is called double oxidization. By using the technique of double oxidization, a thin gate insulating film for internal circuit elements which require high-speed operation, and a thick gate insulating film for peripheral circuit elements which require a high withstand voltage can be formed on the same semiconductor substrate.
When forming gate insulating films by using the technique of double oxidization, for example, first a gate insulating film having a thickness between a thickness of a thick gate insulating film and a thickness of a thin gate insulating film is uniformly formed on the entire substrate by thermal oxidization. Then, this gate insulating film is removed only from the region where the thin gate insulating film is to be formed. After that, the entire surface of the substrate is oxidized again according to the specification of the thin gate insulating film. At this point, formations of both the thin gate insulating film and the thick gate insulating film are completed. In this re-oxidization process, the regions where the thin gate insulating film and the thick gate insulating film are to be formed are oxidized while the gate insulating film formed in the first oxidization process still remains in the region where the thick gate insulating film is to be formed. Therefore, the overall thickness of the gate insulating film formed in the region where the thick gate insulating film is to be formed should become thicker by the thickness of the gate insulating film formed in the re-oxidization process.
For example, manufacturing methods of semiconductor devices using the double oxidization technique are shown in Japanese Laid Open Patent Publication No. 2-271659, especially, pp. 3-4, and FIG. 1, and Japanese Patent Laid Open Patent Publication No. 4-297063, especially, p. 3, FIGS. 1 and 3. Japanese Laid-Open Patent Publication Nos. 2-271659 and 4-297063 are hereby incorporated by reference.
According to the double oxidization technique used in the manufacturing method of a semiconductor device as disclosed in Publication No. 2-271659 silicon nitride films used as oxidation resist films at the time of forming a field oxide film is further used as oxidation resist films for regions where thin gate insulating films are to be formed when forming a thick gate insulating film by using a LOCOS (Local Oxidation Of Silicon) method.
The manufacturing method of a semiconductor device shown in Japanese Laid-Open Patent Publication No. 4-297063 is similar to that of Publication No. 2-271659. Publication No. 4-297063 provides a modified example of the method in which the silicon nitride film used as the oxidation resist film at the time of forming the field oxide film is further used as the thick gate insulating film.
As mentioned above, in the generally used technique of double oxidizing, first a gate insulating film having a thickness between a thickness of a thick gate insulating film and a thickness of a thin gate insulating film is formed uniformly. For instance, supposing that the thin gate insulating film is 3 nm (nanometer) thick and the thick gate insulating film is 7 nm thick, a gate insulating film of about 5 to 6 nm in thickness would be formed in the first oxidization process. After the gate insulating film is formed, this gate insulating film is etched only at the region where the thin gate insulating film is to be formed. At this time, however, the field oxide film is also etched, and is made thinner. Such thinning of the field oxide film reduces the threshold voltage at which a parasitic MOS transistor turns on, and invites adverse effects with regards to the operation and reliability of a circuit.
According to the methods of manufacturing semiconductor devices given in the aforementioned Japanese Laid-Open Patent publications, in order to prevent the field oxide film from thinning due to the etching of the gate insulating film, a process of removing the gate insulating film is not included. However, the methods include a process of removing an underlay oxide film which is placed directly under the silicon nitride film for the purpose of stress relief. Since the underlay oxide film is about 20 nm thick, the field oxide film would become about 20 to 30 nm thinner by this etching process. If a bulk substrate having a semiconductor layer with sufficient thickness is used, thinning of the field oxide film by the thickness of about 20 to 30 nm does not pose any particular problem, because the field oxide film can be thickly formed to become several hundred nm in thickness. However, if an SOI (Silicon On Insulator) substrate or an SOS (Silicon On Sapphire) substrate is to be used, thinning of the field oxide film by the thickness of about 20 to 30 nm will pose a serious problem, because both the SOI substrate and the SOS substrate, where a semiconductor layer of either substrate is about 40 to 50 nm thick, have a field oxide film which is only 80 to 100 nm thick.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved method of manufacturing a semiconductor device. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.